PERFORMANCE

Scheduler Performance

Design Goals

Although speed was not one of the design goals, these being simplicity and safe run-time environment, the performance degree reached with XOberon/PowerPC is astounding. The scheduler, which is responsible for the hard deadlines, must stop a process, save its register-set, choose another candidate for scheduling from the scheduling-pools, and bring it in the foreground. Our scheduler repeats this steps ten times every millisecond, or with a 10 KHz frequency. Such a scheduling frequency allows us to program high performance controllers, which otherwise would have been hooked to an interrupt vector, bringing complexity and taking determinism away.

Scheduling Overhead

It is a little difficult to quantify the overhead of the scheduler, since it scales with the number of installed tasks. Anyway, after bootstrapping, the system overhead is less than one percent of the maximum available processor power on a MVME1600 board, with a PowerPC 604 clocked at 100 MHz. After bootstrapping, the system is scheduling service-maintenance routines, along with ethernet, VME and serial drivers. The overhead scales linearly for more processes, with (rule of thumb) an increment of one percent in the worst case (this being a task which exhibits heavy floating-point use with a 100 microseconds deadline).

As an example, a complex parallel machine (Hexaglide), with seven hard real-time, user installed processes with a (min) 300 microseconds deadline, and some non-real-time processes, brings the scheduling overhead close to five percent.

In the same way, the overhead decreases linearly with better PowerPC implementations, as in the new MVME2600 board, powered by a 200 MHz PowerPC604e. In this case, the scheduling overhead after bootstrapping drops to 0.4 percent.

How is this possible?

How can XOberon achieve such a performance, which is, by the way, at least three times faster than commercial real-time operating systems running on the same architecture? The answer is simple: a highly optimized scheduler.

The scheduler has been optimized in three ways:

• very tight implementation
• hand-tuned assembler code-snippets
• very efficient algorithms, and most important:
• optimizations in the context-switching, done on a per-process-base
• stack-prefetching
• fine-tuned memory management
• real world, on-chip performance measurements for speed-tuning

As an example, the context switch is usually implemented with a dumb "save everything for the next time" algorithm. XOberon uses the same object-oriented abstractions, presented to the programmer, in order to choose an optimal way for saving (and restoring) this particular task's context. Therefore, some processes are context-switched faster than others, according to the process state.

Floating-Point Performance

The raw floating-point number crunching of XOberon is also exceptional, thanks to the fast PowerPC floating-point units. Their use has also being tuned for the most speculative execution mode. The usual PowerPC SpecFPs apply here:

• SPECfp95: 8.7, on a PowerPC604e@200Mhz

This computational power allows newer applications to be built, by calculating complex kinematics and dynamic models in real-time, with less than 1 millisecond deadline, eventually allowing to direct control robotics motors at their mechanical limits.

For example, the Hexaglide milling machine, is being run on a PowerPC604@100Mhz, with thefollowing hard real-time tasks, among others (system maintenance or not relevant):

• PD-controller and velocity observer: period 300 microsecs; 130 fp-multiply, 120 fp-add
• Path-planner: period 300 microsecs; 110 fp-multiply, 100 fp-add
• Dynamic pre-controller: period 2.5 ms; 1720 fp-multiply, 1750 fp-add
• Adaptation of dynamic parameters: period 10 ms, 400 fp-multiply, 380 fp-add
• Data miner, watchdog, security processes ...

The system is loaded up to the 89.8 percent by the hard real-time processes. The scheduler has a lot to do and schedules the 19 application and system tasks with a 5.5 percent overhead.

This number crunching performance opens up new opportunities for intelligent, safer, simpler, software controlled mechatronic applications.

Institute of Robotics Homepage

Jun 1998, R. Brega & M. Honegger